package hardcaml

Control of name generation in a hierarchy of modules. The position of a module within a hierarchy is determined by a path which leads back to the (single) top most parent module. Signal names may be pre-pended with some representation of that path.

• No_path - Nothing is added to the name.
• Local_path - Only the name of the enclosing module is added to the name.
• Full_path - The full path is included in the name

Generally hierarchical names are taken from the circuit name, though it is possible to specify a different instantiation name. These names are mangled so they are unique within each scope.